CoCo 5 Memory Management

This page explores the CoCo5 Management in three sections.

  1. The CoCo5 Standard Memory Map.
  2. The Address Path for each CPU and memory access mode.
  3. The GIMMEx32 addressing scheme.

Standard Memory Map


I/O Buffers virtual Tape Iigh Def. Video Memory volatile Un-Disk non-volatile Un-Disk non-volatile Quarter-Disk Settings Home Memory for CPU #2 Shared Memory for CPU's 3  and 2 Home Memory for CPU #3 Shared  Memory for CPU's 2 and 1 Shared Memory for All CPU's Shared Memory for CPU's 3 and 0 Home   Memory for CPU;s 2 and 1 Shared Memory for CPU;s 1 and 0 Home Memory for  CPU #0 CoCo 5 Memory Map

We will call each functional block of Memory a Super Block. Each seperate Clickable block in the image above is a superblock.
EachSuper Block is described below.


Superblock A:
Home Memory CPU#0


This 512K block is the Home Memory for the Master System Controller CPU#0. This means that no other CPU can access this memory and in this case also the GPU can only access this memory in Read Only Mode. This memory space is the "Protected Kernel Space" for the CoCo 5 System Control program.
The CPU always runs at full 8x speed which is 7.159 MHz. and primarily deals primarily with the keyboard and video it also provides some API sharing functions to the other CPU's.

The 8K block 0 for Standard Mode Addressing and Low Extended Mode Addressing is shown in red on the left.
This 512K Super Block contains Standard Mode Addressing blocks 0 to 63 for CPU #0.


The 32K block 0 for High Extended Mode Addressing is shown in red on the right.
Super Block A contains ( Extended Mode High Blocks) EMHB's 0 to 15.
Block 0 for High Extended Mode Addressing.

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Superblock B:
Shared between CPU#1 & CPU#0.
Memory Shared between CPU #1 and CPU #0




This 512K Super Block can be accessed by either CPU #1 or CPU #0 in Standard or Extended Mode.
Special fearture of this Super Block is that the ROM's are maped into it at Power On (See diagraham at right.).
Block 0 for High Extended Mode Addressing.

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Superblock C:
 Shared between CPU's #3 & #0. 



This 512K Super Block can be accessed by
either CPU #3 or CPU #0.

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Superblock D:
 Shared between all four CPU's

 This 512K Super Block can be accessed by ALL CPU's when allowed.

The Standard Block Addressing put's Block 192 at the Top Left and 255 at the bottom right. Block 255 is reserved for CPU#0 and Read/Only by other CPU's.
Block 254 is  reserved by CPU#3 in Tri-CoCo Mode while in Dual-CoCo mode the Block assignments are 254(#1), 253(#2) & 252(#3).

This Super Block has a consistent numbering scheme for Standard Mode Addressing for all CPU's other Blocks may have addresses dependent on which CPU is doing the addressing. High Extended Mode Addressing is not consistant accross CPU's.
      =====>

                                <=====

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Superblock E:
Home Memory  CPU#1


This 512K block is the Home Memory for the CPU#1.
This means no other CPU can access this memory in Tri-CoCo mode where the CPU acts as the 512K "CoCo BLUE" and uses Standard MMU Memory Access Mode.
The CPU #1 runs at any integer multiple of the Color Computer 2 clock rate from 1 to 8 to match functional requirements of the particular hardware interface it is dealing with in any mode.
In Dual-CoCo mode CPU #1 deals with the Hardware Allotment Manager program and uses Extended MMU Memory Access Mode.

The 8K block 0 for Standard Mode Addressing and Low Extended Mode Addressing is shown in red on the left. This 512K Super Block contains Standard Mode Address blocks 0 to 63 for CPU #1.

The 16K block 0 for High Extended Mode Addressing is shown in red on the right.
Standard Block E contains ( Extended Mode High Blocks) EMHB's 0 to 31.
Block 0 for High Extended Mode Addressing.

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Superblock F:
Shared between CPU's
#1 & #2.



This 512K Super Block can be accessed by
either CPU #1 or CPU #2.

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Superblock G:
Home Memory  CPU#2
CPU #2

This 512K block is the Home Memory for the CPU#2.
This means no other CPU can access this memory in Standard MMU Memory Access Mode.
In Tri-CoCo mode this CPU acts as a 64K Color Computer 2 and this block contains the Base 64K RAM and 32K "ROM" for "CoCo Green" in CoCo 2 Mode.
In Dual-CoCo mode CPU 2# may be set to CoCo 2 ===> 4 modes and may use all of the Super Block.


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Superblock H:
 Shared between CPU's #3 & #2. 



This 512K Super Block can be accessed by
either CPU #3 or CPU #2.


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Superblock K:
Home Memory  CPU#3
CPU #2

This 512K block is the Home Memory for the CPU#3.
This means no other CPU can access this memory in Standard MMU Memory Access Mode.
In Tri-CoCo mode this CPU acts as a 2MB Color Computer 3++ designated "CoCo RED".
In Dual-CoCo mode CPU 3# may be set to CoCo 2 ===> 4 modes.


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Superblock V:

High Definition Video Memory

Superblock V: is only accessible by CPU#0 in Extended Mode Addressing and by the GPU.
Its functions are storing data for rendering Hi-Res VGA screens, and Storing  data at the request of CPU#0 for virtual memory management or mathematical manipulation.



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Superblock M:
I/O Buffers
I/O Buffers

This 256K block is reserved for Device DMA.

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Superblock T:
Virtual Cassette Tapes
vTape

This 256K block is reserved for virtual cassette tapes.
It may be organized as 8x32K or 4x64K.

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Superblock U:
Undisk (volitole) Area
UnDisk

This 1280K block is reserved for virtual floppy disk drives.
It's organization is set on CPU #1 RESET based on values stored in the settings memory.

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Superblock P:
Undisk (non-volitole) Area
UnDisk

This 160K block is normaly reserved for virtual floppy disk #0.
Provided it is used for that It will survive Power cyceling.
It may however be set up in another configuration where it is paired with the Undisk volitole Area, The most useful alternate setting being a 1440K OS-9 or HD-PC-DOS in the settings memory.

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Superblock Q:
40K (non-volitole) Area for Qtr Dsk or OS-9 Boot ROM.
UnDisk

This Superblock is only 40K in size it can be used either as a 40K RSDOS disk or for setting up Virtual Coco's to Boot OS-9 from ROM.


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Superblock S:
Non-volitole 56K Area for storing settings.


Settings Memory

The settings stored here control many aspects of the CoCo 5's behaviour.

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The Memory Access Modes and Address Path for each CPU.

Two important things to realize in understanding a CoCo5's memory access is that different virtual CPU's access different parts or the real memory when they send a MMU block request to the GIMMEx32 and that some virtual CPU's may access memory via an advanced block addressing scheme.

So we will enumerate each mode and how it works and which CPU's can use it in a table.

CPU
 Mode
Addressed Blocks in  64K
Low + High = Total
Available Blocks
Available Memory Comments:
#0
Standard  4 + 4 = 8
4*8K + 4*8K = 64K
256
2MB CPU #0 can use both the standard and an advanced mode, in the standard mode 2MB can be addressed. These addresses are located in Super-Blocks A,B,C and D.
(See Figure M1 below)
#0 Advanced  4 + 1 = 8
4*8K + 1*32K = 64K
256 8MB CPU #0 in advanced mode can address all 8 MB of the CoCo5 because the high 32K of the CPU's 64K address space is a single 32K block the low 32K consists of four 8K blocks mapped into Super-Blocks A,B,C and D.
(See Figure M2 below)
#1
Standard  4 + 4 = 8 256 2MB CPU #1 can use both the standard and an advanced mode, in the standard mode 2MB can be addressed. These addresses are located in Super-Blocks E,F,B and D
(See Figure M3 below)
#1 Advanced  4 + 2 = 6
4*8K + 2*16K = 64K
256 4MB CPU #1 in advanced mode can address 4 MB of the CoCo5 because the high 32K of the CPU's 64K address space defined by two 16K blocks the low 32K consists of four 8K blocks mapped into Super-Blocks E,F,B and D  while the high 32Kcan access data in Super-Blocks E,F,B,D,S,Q,P,U,T and M
(See Figure M4 below)
#2
Standard  4 + 4 = 8 256 2MB CPU #2 can use both the standard and an advanced mode, in the standard mode 2MB can be addressed. These addresses are located in Super-Blocks G,F,H and D
(See Figure M5 below)
#3
Standard  4 + 4 = 8 256 2MB CPU #3 can use both the standard and an advanced mode, in the standard mode 2MB can be addressed. These addresses are located in Super-Blocks K,H,C and D
(See Figure M6 below)
GPU Flat ?  N/A N/A 32 MB Whatever works if a flat memory model is too difficult some sort of bank switching might be implemented to map the 32Meg into a flat memory of somewhere between 2MB and 16MB.

CPU/Mode Address Paths.

Memory Addressing Modes
Arrows Show Direction from Low MMU Bank Numbers near 0 to High MMU Bank Numbers approching 255 and each mode has it's own independent set of MMU Bank registers.
Figure M1 -

Eight Registers
Figure M2

Five Registers
Figure M3

Eight Registers
Figure M4

Six Registers
Figure M5

Eight Registers
Figure M6

Eight Registers


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The GIMMEx32 addressing scheme.

My original concept was for 256 Banks of 128K with the GIMMEx32 mapping 16 blocks into a native address space of  2MB but in 1994 it was definitely already  possible to have a 32 Bit address space with Acorn RISC PC's for example so going for an flat memory space for the GPU  implementation  was certainly possible and the simplification it would accomplish make it desirable.